(MENAFN- Asia Times)
Taiwan's TSMC is likely to be the second chip-making company after Intel to receive the Semiconductor industry's most advanced lithography tool as the race to 1-nanometer chips gathers pace.
According to a NIKKEI Asia report, the world's leading integrated circuit (IC) foundry will install ASML's new high-NA extreme ultra-violet (EUV) lithography system at its R&D center in Hsinchu, Taiwan, by the end of this year.
That's about three months later than industry sources had initially expected but not significantly later than America's Intel, which installed its first high-NA lithography system at its R&D center in Oregon last April and its second in August.
Samsung Electronics will reportedly acquire its first high-NA system in early 2025. The Netherlands' ASML has a monopoly on the EUV lithography systems that TSMC uses to make ICs at the 7nm and smaller process nodes.
High-NA lithography systems, also known as EXE systems, likewise use EUV light but employ a new optical system that increases the numerical aperture (NA) from 0.33 to 0.55. That reduces the critical dimension, or the smallest feature the system can print, by 1.7 times and increases the transistor density on a chip by 2.9 times.
Numerical aperture is“a measure of the ability of an optical system to collect and focus light,” in the words of ASML:“The higher NA is what gives the systems their better performance.”
According to reports, TSMC aims to start using high-NA lithography at the 1.4nm node (14A, A for angstrom) in 2028 or later, or at 1nm (10A) in 2030 or later. The 2nm process it plans to introduce by the end of 2025 will use currently available EUV lithography systems.
That is probably just as well since the development and evaluation work required to use high-NA EUV efficiently in commercial production will take a long time.
The technology is also very expensive, reportedly costing at least $350 million per system or roughly twice the price of standard EUV equipment. Presumably that figure will come down as unit demand rises.
While TSMC integrates high-NA EUV into its technology upgrade roadmap, Intel is using it as part of CEO Pat Gelsinger's aggressive catch-up strategy, which to date has been dogged by disappointing yields, restructuring charges, lots of red ink and outsourcing to TSMC down to 3nm.
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