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Belt & Road: Chinese techno-nationalism in Maldives “We are now putting together many chips into a tightly integrated, massively interconnected system. This is a paradigm shift in semiconductor-technology integration,” say the two executives. They explain this as follows:
TSMC has already used CoWoS in its transition from 7-nm
to
4-nm technology, putting 50% more transistors in the same area for Nvidia and other customers. It also uses a technology called system-on-integrated-chips (SoIC) to make the HBM used with GPUs.
A high-badwidth memory chip consists of a stack of vertically interconnected dynamic random-access memory chips atop a control logic integrated circuit. According to TSMC, 12-layer HBM test structures have been created using 3D SoIC technology.
Next, we are told, optical interfaces based on silicon photonics“will allow the scaling up of energy- and area-efficient bandwidths for direct, optical GPU-to-GPU communication, such that hundreds of servers can behave as a single giant GPU with a unified memory.”
These innovations plus advances in electronic design automation (EDA), materials science and fab equipment, should keep the energy-efficient performance (EEP) of semiconductor systems rising at its historical rate of about three times every two years. EEP expresses a combination of energy efficiency and processing speed.
If this sounds complicated, that's because it is. Liu and Wong themselves say,“From here, semiconductor technology will get harder to develop.” But help is on the way in the form of 3Dblox, an open-standard 3D IC design system sponsored by TSMC, Intel, EDA companies Cadence, Siemens and Synopsis and engineering software company Ansys. They call this“A Mead-Conway Moment for 3D Integrated Circuits.”
In 1978, Professor Carver Mead of the California Institute of Technology and Lynn Conway of the Xerox PARC research and development company created a computer-aided design system that enabled engineers to design very large-scale integrated circuits without much knowledge of the semiconductor process technology required to make them. 3Dblox does the same for 3D ICs and packaging, say Liu and Wong, giving designers“a free hand to work on a 3D IC system design, regardless of the underlying technology.”
“In the era of artificial intelligence,” Liu and Wong predict,“an integrated AI system can be composed of as many energy-efficient transistors as is practical, an efficient system architecture for specialized compute workloads and an optimized relationship between software and hardware.” That sounds like AI-enabled design of AI processors, most of them made by TSMC.
Meanwhile, Taiwanese media report that most of TSMC's manufacturing capacity is back on line. Buildings, some pieces of equipment and wafers in process were damaged, but the most important parts of the production lines, including the advanced (and very expensive) EUV lithography systems, were not.
For the past 25 years, TSMC has been implementing what are called seismic management measures to protect its operations from earthquakes. As an indicator of their success, Taiwan's DigiTimes reports that TSMC's estimated loss from the April 3 earthquake, after insurance payments, is likely to be about NT$ 2 billion, or only US$62.2 million at the current exchange rate.
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