AMD Deepens Taiwan AI Supply Chain Bet Arabian Post

The move comes as AI infrastructure spending shifts from individual chips towards complete systems that combine CPUs, graphics processors, high-bandwidth memory, networking and software. Advanced packaging has become a critical bottleneck because AI workloads require large volumes of data to move quickly between processors while keeping power consumption and heat within manageable limits.

AMD Chair and Chief Executive Lisa Su said customers were rapidly expanding AI infrastructure to meet rising compute demand. The company is seeking to combine its high-performance computing portfolio with Taiwan's manufacturing and packaging capabilities to support integrated, rack-scale AI systems.

AMD is working with partners including ASE, SPIL, Powertech Technology, Wiwynn, Wistron, Inventec, Unimicron, AIC, Nan Ya PCB and Kinsus. These companies cover key parts of the supply chain, from advanced packaging and substrates to server assembly and mechanical architecture. Sanmina is also involved in manufacturing support for the company's Helios platform.

The investment will support both wafer-based and panel-based EFB interconnect development. AMD and Powertech Technology have qualified what they describe as the industry's first 2.5D panel-based EFB interconnect, a step aimed at improving scalability and production economics for high-volume AI processors.

The technology is expected to help the“Venice” EPYC processors deliver higher interconnect bandwidth and better power efficiency. That matters because data centre operators are increasingly constrained by electricity availability, cooling capacity and rack density, not only by chip performance.

AMD has also begun ramping production of“Venice” CPUs using Taiwan Semiconductor Manufacturing Company's 2-nanometre process technology in Taiwan. Future production is planned at TSMC's Arizona facility, extending the supply chain beyond Taiwan while preserving the company's close reliance on TSMC's leading-edge manufacturing.

The“Venice” chips will be a central element of AMD's Helios rack-scale platform, which also includes AMD Instinct MI450X graphics processors, advanced networking and the ROCm open software stack. The platform is scheduled for deployments beginning in the second half of 2026, with AMD describing the opportunity in terms of multi-gigawatt AI infrastructure rollouts.

The strategy puts AMD in a more direct contest with Nvidia, which dominates AI accelerator sales and has built a strong lead through its GPUs, networking, software ecosystem and full-rack systems. AMD's challenge is not only to deliver competitive silicon but also to prove that it can scale complete AI infrastructure with dependable supply, efficient packaging and broad software support.

AMD's data centre business has become the company's main growth engine. First-quarter 2026 data centre revenue reached $5.8 billion, up 57 per cent from a year earlier, driven by demand for EPYC processors and the ramp-up of Instinct GPU shipments. That performance has strengthened investor expectations that AMD can capture a larger share of AI and cloud infrastructure spending.

Taiwan remains critical to that effort because of its concentration of semiconductor expertise. TSMC anchors the foundry side, while packaging, substrate and system-assembly partners provide the manufacturing depth needed to turn chip designs into deployable infrastructure. The concentration also creates geopolitical and supply-chain risks, particularly as governments and companies seek greater resilience across strategic technologies.