Iisc Unveils Rs 500 Cr Initiative To Develop Next-Generation Angstrom-Scale Chips
These chips would be significantly smaller than current 3-nanometer nodes, enabling more powerful and energy-efficient devices.
The IISc team plans to utilise 2D materials like graphene and transition metal dichalcogenides (TMDs) to construct these ultra-thin semiconductors.
This approach aims to replace traditional silicon, which has limitations in scaling down further project envisions a five-year timeline, with a roadmap for self-sustainability post-initial funding.
Currently, semiconductor manufacturing is dominated by countries such as the US, Japan, South Korea, and Taiwan.
India's reliance on foreign semiconductor technologies has strategic and economic implications. The IISc-led proposal seeks to establish India as a leader in next-generation semiconductor technology.
The Ministry of Electronics and Information Technology (MeitY) has shown interest in the project, with discussions ongoing regarding potential applications and collaborations.
This initiative aligns with India's broader efforts to enhance its semiconductor capabilities, including the India Semiconductor Mission, which supports projects like the Tata Electronics and PSMC collaboration.
While this Rs 500 crore proposal is modest compared to large-scale initiatives, it represents a significant step toward indigenous semiconductor development.
(KNN Bureau)
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